1. Technical Field
The present disclosure relates to a semiconductor device and a method for manufacturing the same.
2. Description of the Related Art
From the viewpoint of stringency of power supply and global environmental protection, power semiconductor devices which can decrease power loss have recently attracted attention, and many development examples have been reported and put into practical use. In power semiconductor devices, a high voltage is applied between a gate electrode and a semiconductor substrate. Gate electrode wiring is not only used for active elements but also used as wiring for applying potential to gate electrodes. With respect to active elements, efforts are made to improve breakdown voltage by forming a depletion layer according to a proper design of a structure of a semiconductor substrate. On the other hand, a portion used as wiring requires a wide area for forming contact with upper-layer wiring and decreasing wiring resistance, thereby causing difficulty of countermeasure on the semiconductor substrate side. In these semiconductor devices, breakdown voltage is secured by forming a thick field insulating film between a gate wire and a semiconductor substrate as disclosed in, for example, Japanese Patent No. 3998288 and Japanese Unexamined Patent Application Publication Nos. 2006-128407 and 57-62542.
A LOCOS (Local Oxidation of Silicon) method is known as a general method for forming field insulating film.